IBM 29.9nm Chip

Pictured on the left is the record-small array of 29.9-nanometer-wide lines and equally sized spaces created by IBM scientists (at its Almaden Research Center in San Jose, California) using a variation of optical lithography. These lines are less than one-third the size of the 90-nanometer features (example at right, same magnification)




At "SPIE Microlithography 2006" conference today in the Silicon Valley city of San Jose, IBM researchers have announced a major breakthrough: They have designed the first micro-chip with a width of only 29.9 nanometres using new materials developed by its collaborator, JSR Micro (Sunnyvale, California). The new chip has one-third of the size of the 90nm circuits currently mass produced today by the commonly-used process of optical lithography.

This provides a reprieve from the predicted need to switch to more costly, unproven chip-making methods. Until now the chip industry faced tough questions about which lithography technology would allow them to be successful below 32 nanometers. IBM’s Almaden Research Center and its Silicon Valley partner, JSR Micro, say they can now extend optical lithography with new “immersion” techniques, where the lasers pass through liquid with a high refractive index. This creates a sharper focus and allows the imaging of smaller features. "We believe that high-index liquid imaging will enable the extension of today's optical lithography through the 45- and 32-nanometer technology nodes," said Mark Slezak, technical manager of JSR Micro, Inc.

We want to remind our readers that Intel started shipping 65nm chips last year and it is expected that the 65nm technology will become industry standard in the 3rd quarter of 2006.

For more details, see IBM's Press Release.